1. Field of the Invention
This invention relates to a test method for a network relay apparatus and a network relay apparatus, and more particularly to a test method for a network relay apparatus and a network relay apparatus for testing a margin for data transfer processing of the network relay apparatus.
2. Description of the Related Art
With an increase of speed, improvement of integration, and a reduction in voltage of a router (an IP router), it becomes difficult to perform design with a margin secured. Therefore, there is a possibility that a lack of a margin with respect to noise jitter of a signal causes a failure. The failure due to a lack of a margin is apparent when the router operates near a performance limit. Thus, it is necessary to perform a test concerning whether or not a margin for a function of data transfer processing is sufficiently secured by creating a state in which a test object router (a router to be tested or router under test) transfers an amount of data in the performance limit.
For example, as shown in FIG. 12A, a test apparatus 102 that generates and transmits a test packet is connected to the outside of a test object router 101, and continuously transmits packets to the test object router 101. Consequently, the test packet relayed by the test object router 101 is received by the test apparatus 102, and is used for an inspection on whether the test packet has arrived and an inspection of content of the test packet.
It is assumed that a standard of transfer performance of an interface (e.g., Ethernet (registered trademark) GbE), which connects the test object router 101 and the test apparatus 102, as shown in FIG. 12B, is transfer performance of 1 Gbps (Giga-bit per second). Usually, transfer performance of the test object router 101 is designed to be 1.2 Gbps, for example, taking a margin into account such that the transfer performance exceeds the standard of 1 Gbps of the transfer performance of the interface. However, it is impossible to transmit and receive a test packet exceeding the transfer performance of the interface. Therefore, in this case, it is impossible to perform, for a router designed taking a margin into account, a test with attention paid to an upper limit value of a data transfer amount.
Thus, it can be guessed that a test is performed within the test object router 101, without using the test apparatus 102 on the outside of the router 101. In this case, as shown in FIG. 12C, generation, transmission, reception, and inspection of a test packet are performed in a plurality of semiconductor devices (chips) 1041 to 1044, which are constituting the test object router 101.
On the other hand, in the present router, a switching capacity is enormous, and transmission and reception paths are separately mounted (a structure capable of performing full duplex communication is adopted). Therefore, it is necessary to create a state in which a large number of test packets are simultaneously transferred within the test object router 101, and verify an operation. Thus, for example, it is known to create a state in which one test packet passes a transfer path a plurality of times and increase of a transfer load, due to use of a return mechanism and contriving of set of a TTL (Time to Live) value of a test packet inside of a test object router (Patent Document 1; Japanese Patent Application Laid-open No. 2000-151701).
According to our examinations, there are problems described below when a test is performed within the test object router 101 as described above.
As shown in FIG. 12C, a test processing program 1031 for performing generation and transmission of a test packet is provided in the semiconductor device 1041. Therefore, test processing in the semiconductor device 1041 is added, and packet transmission performance of the semiconductor device 1041 is deteriorated by an amount equivalent to the addition. In the semiconductor device 1044 provided with the test processing program 1032 for performing reception and inspection of a test packet, packet reception performance is deteriorated similarly. Therefore, it is difficult to transfer test packets of a number satisfying the upper limit value of the data transfer amount.
In the test object router 101 a packet transfer path is usually constituted by special hardware. Thus, transfer speed on the path is higher than speed (frequency or transmission intervals T1) of transmission of a packet by a CPU. For example, in the technique described in the Patent Document 1, as shown in FIG. 12D, it is assumed that a test packet P1 transmitted by the CPU loops 255 times in the transfer path, and then returns to the CPU. However, there is a strong possibility that the test packet P1 returns to the CPU before the CPU transmits a test packet P2. Therefore, as shown by a dotted line in FIG. 12D, it is impossible to transmit the next test packet P2 while the test packet 1 loops in the transfer path. This makes it difficult to create a state in which a large number of packets P1, P2, . . . are simultaneously transferred on the path.